388 Appendix D (a) Voltage on RA4 3V RA4 = 1 1.5V RA4 = 0 Delay while C discharges time Sample RA4 every 20s & increment count in PotVal register until RA4 goes high Lower Pot Resistance - Faster Charging Higher Pot Resistance - Lower Count - Slower Charging - Higher Count Charging Time Varies with Pot Resistance (b) Set RA4 as Output Clear RA4 to 0V to discharge C Clear Counter Register Set RA4 as Input Test RA4 while C charges through R: Increment Counter Register Delay 20us Until RA4 = 1 Convert Count to Resistance or Pot Position Figure D.4 CR ADC conversion: (a) waveform at analogue input; (b) conversion procedure outline sequence is given in the data sheet and LOCK program listing. The read sequence, for retrieving the data, is more straightforward. Using EECON1, the data in the address pointed to by EEADR is returned in EEDATA. For accessing sequences of locations, EEADR can be incremented directly. See Chapter 6 for more details. D.5. LOCK Application In this demonstration application, a sequence of four decimal digits is stored in the PIC EEPROM memory from the DIL switch inputs. This sets the combination for the lock. To `open' the lock, the pot is rotated, and the input decimal digits are displayed and entered. This simulates the rotary action of mechanical combination locks. If the sequence of four input digits matches that previously stored in EEPROM, a siren sound is made to indicate the opening of the lock.