446 C H A P T E R 22 Buses provide the requested data. The PCI specification calls such an exchange a delayed transaction. Delayed transactions share with split transactions the ability to allow other bus transactions to proceed during long latency operations. The delayed transaction mechanism, however, is considerably less efficient than a split transac- tion mechanism and is only intended to handle exceptional cases. A split transaction mechanism is intended to handle most or all bus requests, and hence must be more efficient. The PCI specification includes a set of protocols for module initialization. In addition to addressing modules using the AD bus during an address cycle, an alternate addressing mechanism using a radial select signal, IDSEL, is used to select a module by its slot number. Configuration read and write cycles can be run using IDSEL addressing to read and write the configuration registers of a module. In a typical initialization process, some configuration registers are read to identify the module type. The controller then writes configuration registers to set the address of the module, and to configure module options. 22.6 Bibliographic Notes Buses have been around long enough that it is hard to identify when they first appeared. They certainly existed in the early computers of the 1940s and 1950s. Starting with Digital's Unibus, buses became a standard peripheral interface. Both the PCI bus [143] and the Small Computer System Interconnect (SCSI, pronounced scuzzy) bus [173] are modern examples of peripheral interface buses. For a long period of time (1960s to 1980s), a typical minicomputer or microcomputer used a bus to connect memory modules to the CPU. In modern PCs this has been replaced by point-to-point connection through a north-bridge chip. Perhaps one of the most interesting and high-performance buses today is Rambus's DRDRAM bus used to connect to high-bandwidth DRAM chips [41]. The on-chip network offered by Sonics uses the OR-tree approach to realizing a bus with point-to-point intercon- nects [193]. The Sun Ultra-Enterprise 10,000 [35] also realizes a bus with point-to -point interconnects. The UE 10,000 also provides multiple address buses to increase throughput. It is perhaps a good advertisement for why one should use a network rather than a bus. The Digital Bus Handbook [72] gives a more complete overview of bus technology than there is room for in this chapter. 22.7 Exercises 22.1 Multiplexed versus non-multiplexed bus. Consider a bus on which all transactions require sending an address message with a 32-bit address field and a 4-bit control field from the bus master to a bus slave. Read transactions, that comprise 70% of all transactions, are then completed by having a 32-bit data message sent from the slave to the master. Write transactions, that comprise the remaining 30% of all transactions, are completed by having a 32-bit data message sent from the master to the slave. This