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Chapter 15. Modifying > Appendix A: Detailed Register Description - Pg. 584

584 APPENDIX A DETAILED REGISTER DESCRIPTION A detailed description of all TOPmodify devices and registers is given in this appendix. Though some of the information here duplicates that which can be found in the body of the chapter, the details and descriptions are fleshed out considerably. The registers below, their bit functions and their overall roles are those of NP-1 and NP-1c. NP-2 and above NPs are slightly different, as more registers and bits are available to reflect more functions, ports, and functional blocks that are not described in this book. MICROCODE REGISTERS The microcode registers are accessed by the microcode for normal operations dur- ing program execution and include user-defined, functional, specific, and output interface registers. User-Defined Registers Register name UDB Description 32 user-defined bits that can be used for conditions (branches). Other Registers Register name Description FAST_REG 32-bit input for accelerating modifications, fixed addresses. The 32 labels/addresses corresponding to the 32 operations performed via the Modification Accelerator are downloaded from the host. 32-bit ALU feedback register with the last result of the ALU calculation. Used to per- form adjacent ALU calculations and avoid a data hazard. 16-bit CAM output register. 8-bit CAM input register. Four 10-bit registers specifying the four instructions currently in the pipeline. HISTORY0 Byte 0­1: Fetch stage HISTORY1 Byte 2­3: Decode stage HISTORY2 Byte 0­1: Execution 1 stage HISTORY3 Byte 2­3: Execution 2 stage ALU CAMO CAMI HISTORY