160 CHAPTER 7 Timing Optimization for Two-Terminal Interconnects every allowed interval is determined. In the following steps, for each unprocessed via, the range of values for the optimum via location as given by (7-26) is evaluated. In step 5, these values are compared to the inequalities described in the previous subsection. If an optimal via location is determined in this step, the via is marked as processed and the capacitance and resistance arrays are updated. If, after a num- ber of iterations, there are nonoptimal vias, in step 14 these vias are placed at the center of the corresponding allowed intervals and the algorithm terminates. Other criteria, such as routing congestion, can alternatively be applied to place nonoptimal vias rather than placing these vias at the center of the corresponding allowed intervals. Further criteria can be considered to search for the optimum location of the nonoptimal vias, trading off runtime with accuracy. 7.3.3 Application of the Via Placement Technique The via placement algorithm has been applied to several interconnect instances to validate the accuracy and efficiency of the heuristic.