8.5 Summary 183 Despite the considerably lower computational time of these algo- rithms, further speed improvements can be achieved if more than one net are simultaneously processed. Although these algorithms support multiple net optimization without significant modification, a single net at a time approach likely yields improved results as the most critical nets are routed first. Net ordering algorithms [20] can be used to prioritize the routing of these interconnects, permitting the delay of these nets to be considerably reduced. In addition, since the number of interplane interconnects is small as compared to the number of intraplane interconnects [123], processing these inter- connects one net at a time will not significantly increase the total computational time. Thermal issues are important in 3-D ICs, as discussed in Chapter 6, where additional dummy vias are utilized to control the average and peak temperature of the upper planes within a 3-D system. In addition, thermally aware cell placement improves the heat distribu- tion and removal characteristics. These two techniques are decoupled