846 CHAPTER 13 Synthesis of clock and power/ground networks C k C G þ x ¼ b k þ x kÀ1 h h (a) With the information provided in section 13.4.2 for RC net- works, rewrite this equation for a node x only in terms of con- ductances g i , current load I x , and voltage values V i . (b) With the preceding equation, formulate the corresponding sto- chastic game and describe its meaning. (Hint: first reformulate to solve for V x on the LHS and then describe what each term on the RHS would represent.) 13.15. (Decoupling Capacitor) Consider the floorplan shown in Fig- ure 13.64. Suppose after solving the linear program, you realize that the decoupling capacitance requirement of m 1 cannot be fulfilled. However, there are some slacks in w 1 and w 2 . How would you meet the decoupling capacitance requirement of m 1 without increasing the chip area? Suggest an iterative approach on the basis of the linear program in Section 13.4.3.4 to enhance the utilization factor of white space for decoupling capacitor deployment. 13.16. (Decoupling Capacitor) For a decoupling capacitor to be effective