Multiprocessor processing element 79 elements of the multiprocessor. For the remainder of the chapter, we use the most advanced adapter architecture as a basis, the one with partitioned memory, MMU, and intelligent DMA and map its components to processing elements in various configurations. Single SPE configuration Considering the organization of the Cell BE with heterogeneous elements, we employ the Cell BE elements as shown in Figure 5-11. The Cell BE is used for both the protocol processor and MMU functionalities. Specifically, the PPE is assigned with the MMU functionality, while a single SPE is assigned with protocol processing. The off-chip (off-Cell BE) packet memory is connected to the Cell BE memory interface, while the Cell BE I/O interface is attached to the intelligent DMA unit. Thus, the EIB interconnects all adapter components. The case of the Cell BE offers significantly more advantages than just a set of powerful processing elements. These advantages originate from the EIB and its multiple data rings. The advantage of multiple data rings becomes apparent when considering the contention on the single bus of the adapter analyzed earlier. In the single bus adapter, it is often the case that two different resources compete for the