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Circuit principles for DA converters are mainly based on direct conversion techniques of the input code. Achievable sampling rates are accordingly high.
The definitions of resolution, total harmonic distortion (THD) and total harmonic distortion plus noise (THD+N) correspond to those for AD converters. Further specifications are discussed in the following.
Figure 3.37 Delta-sigma AD converter.
Settling Time. The time interval between transferring a binary word and achieving the analog output value within a specific error range is called the settling time tSE. The settling time determines the maximum conversion frequency fSmax = 1/tSE. Within this time, glitches between consecutive amplitude values can occur (see Fig. 3.38). With the help of a sample-and-hold circuit (deglitcher), the output voltage of the DA converter is sampled after the settling time and held.