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5.6. Stimulus > 5.6.3. HDL Testbench - Pg. 92

92 Chapter 5 Mode2 Decode Valid Pulse Detected Figure 5­6: Output Results from Graphical Stimulus 5.6.3. HDL Testbench An HDL testbench is an HDL file that describes the input. It looks similar to an HDL design and shares some of the same advantages. For example, it is easy to switch between different manufacturers and more flexible than graphical or interactive stimulus formats. Testbenches can be written as · · Manual. The output results must be viewed manually to determine if they are correct. Automatic. Outputs are evaluated by the code and the final results are provided. Final results can be something like a pass/fail indicator on the screen or data written to an external file. Each of these testbench options is examined in this section. A VHDL testbench has a design structure similar to the design code, it has the same sections as a regular VHDL design. A testbench starter template has been provided, see Listing 5­1.