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The Flight > A Template and an Example for a Timer1 Interrupt - Pg. 72

72 Chapter 5 Table 5.2: Trap vector table Vector Number 0 1 2 3 4 5 6 7 IVT Address 000004h 000006h 000008h 00000Ah 0000Ch 00000Eh 000010h 000012h Trap Source Reserved Oscillator failure Address error Stack error Math error Reserved Reserved Reserved Traps Eight additional vectors occupy the first locations at the top of the IVT table (Table 5.2). They are used to capture special error conditions such as a failure of the selected CPU oscillator, an incorrect address (word access to an odd address), stack underflow/overflow or a divide by zero (math error). Trap Vector Details