16.4. On-Chip Supply Noise Measurement Techniques

Power supply noise is one of the major factors constraining the performance of modern high-speed link designs. The characterization of power supply noise is crucial for a robust and reliable channel implementation. However, as discussed earlier, accurately measuring high-frequency supply noise off-chip is very difficult. As a result, various on-chip supply-noise measurement techniques have been developed to observe over- or under-shoot events over a certain time window ^[13], or reconstruct repetitive noise in sub-sampling scope mode [10]. Unfortunately, although they are useful when measuring specific properties of supply noise, these techniques cannot capture the high-frequency noise present in a multi-gigahertz I/O interface. The voltage resolution of these techniques is usually inadequate for measuring the noise present in high-speed designs.

Ideally, one would like to measure the supply noise, on the internal power rails, for frequencies up to a multiple of the fastest toggle frequency. For a system with a data rate of 6.4Gb/s (and a maximum data toggle rate of 3.2GHz), the supply noise frequency can reach 10GHz or more. Measuring supply noise on an internal supply rail at these high frequencies is a challenging task, and requires special noise-monitor circuits. Both the frequency domain spectrum of the supply noise and the supply noise waveforms in the time domain that facilitates correlation with simulation need to be measured. So, a noise monitor with sufficiently high bandwidth for frequencies beyond 10GHz is desirable. This monitor can not only provide measurement results for the frequency domain noise spectrum, but can also be used to construct the time domain noise waveforms. Therefore, a measurement technique with bandwidth up to multi-gigahertz, and voltage resolution finer than mV is highly desirable.