17.4. CDR and Equalization Adaptation Interaction

Adapting equalization coefficients will change the overall channel response (as seen by the receiver sampler), whereas operation of a clock and data recovery loop (CDR) will track any changes affecting phase position. (Chapter 10, “Clock Models in Link BER Analysis,” shows how to derive the CDR nominal locking position for a given channel.) The CDR shifting the sampling position changes the amount of ISI that is seen by the samplers. This, in turn, changes the equalization tap weights through the adaptation engine ^{[24] [25]}. In this section, the impact of this interaction between equalization adaptation and CDR loops on link performance is examined using an architecture that contains both transmitter equalization and receiver DFE. Specifically, it will be shown that with DFE canceling postcursor ISI, canceling precursor ISI with symbol-spaced transmitter equalization degrades rather than improves performance for most channels. This is due to the interaction between equalization adaptation and CDR loops, coupled with the transmitter peak-power constraint.

To exploit the complementary strengths of Tx-FIR and DFE, the design shown in Figure 17.14 shows an example architecture using a Tx-FIR to remove precursor ISI, and a DFE to remove postcursor ISI. As previously discussed in Section 17.2.1, a Tx-FIR must reduce ISI at the expense of signal swing, due to its inherent peak-power constraint. In contrast, a DFE has no peak power constraint, and removes ISI without reducing the signal swing. Due to the causal nature, however, a DFE cannot remove precursor ISI. The receiver uses a 2x over-sampled CDR circuit to recover timing information. It unrolls the first DFE tap by using partial response DFE (PrDFE) to avoid the tight feedback loop of conventional DFE. To reduce the impact of edge ISI on timing recovery, the receiver employs PrDFE on the edge samplers as well.