14.1. Importance of Supply Noise Induced Jitter

High-speed interfaces require very low random and deterministic jitter to meet ever-shrinking timing budgets. As the data rate increases, the acceptable timing loss due to supply distortion decreases. In general, timing jitter can be reduced in either of two ways: reduce the circuit’s sensitivity to supply noise, or reduce the amplitude of the supply noise itself.

A common approach to this problem is to scale the noise budget of the system’s supply rails, so that they are inversely proportional to the system’s data rate. Assuming that the circuits have a constant sensitivity to supply noise, scaling the supply noise in this way assures that the relative contribution of PSIJ to the total bit time (UI) remains constant. However, this approach makes designing the power distribution systems more difficult. For Gigabit I/O systems, pure linear scaling of the supply noise budget to the data rate would soon lead to unrealistic supply budgets, which cannot be achieved in a system with reasonable package and decoupling resources.