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8.9 State reduction > 8.9 State reduction - Pg. 225

Clock-driven sequential circuits 225 from every transition recorded in the state table, and this is achieved with the help of the JK flip-flop steering table developed in Chapter 6 and presented again for convenience in Figure 8.12(c). Since three secondary variables are required to uniquely define each of the eight states, three JK flip-flops will be required for the circuit implementation. In Figure 8.12(d) the state table has been redrawn, each state now being represented by the combination of three secondary variables allocated to it on the state diagram. Alongside the state table are twelve columns in which the flip-flop input signals J C , K C , J B , K B , J A , and K A are tabulated. The entries in these columns are obtained from the steering table. For example, if the present state is CBA 000 and X 1, the next state CBA 100; hence, C t 0 and C tt 1. Thus, from the steering table, the entry for a 0 3 1 transition is J C 1 and K C X. For both B and A the transitions recorded are 0 3 0 and from the steering table the entries for the B and A inputs are J B J A 0 and K B K A X. K-maps for each of the input signals are now plotted. These are shown in Figure 8.12(e) and the next state equations, derived from these maps after simplification, are " " J C X B A " J B XC A " K C XB BA " " K B CA C A K A B " " " J A XC X C B