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In previous chapters, we considered the world to be purely digital. Indeed, with the exception of Chapter 13, we further considered only synchronous systems. Of course the real world is asynchronous and, even worse, analog. All digital systems must at some point interact with the real world. In this chapter, we consider how analog inputs are converted to digital signals and how digital signals are converted to analog outputs. Until relatively recently, the modeling and simulation of digital and analog circuits and systems would have been performed independently of each other. A set of analog and mixed-signal extensions to Verilog (but not yet SystemVerilog) has been proposed. The language is commonly known as Verilog-AMS (analog and mixed-signal). Verilog-AMS is a complete superset of the 2005 standard for Verilog. At some point in the future, it is likely that SystemVerilog-AMS will appear, but meanwhile, simulators that support mixtures of Verilog, Verilog-AMS, and SystemVerilog exist.
Having looked at digital-to-analog converters (DACs) and analog-to-digital converters (ADCs), we will review the basics of Verilog-AMS and see how ADCs and DACs can be modeled in Verilog-AMS. There is insufficient space to provide a complete tutorial of Verilog-AMS here. Furthermore, it should be remembered that we are only considering simulation models, designed for verifying the interaction of a digital model with the real world. Synthesis of analog and mixed-signal designs is still a research topic. The final section of this chapter looks at some further mixed-signal circuits and their models in Verilog-AMS.