4.3 INSTRUCTION CYCLE

Figure 4.7. Timing diagram of instruction cycle for fetch operation in S1, S2 and S3 clock states if the length of the instruction is 1 byte

An instruction cycle is the cycle in which the steps take place for fetching an instruction (including fetching of needed operands) and for executing the instruction. Figure 4.7 shows an instruction cycle. It is measured in cycles. An instruction needs a minimum of one cycle. ADD A, R5 needs one cycle. ADD A, #08 also needs one cycle in 8051. MUL AB needs four cycles. A cycle takes 1μs period when XTAL frequency in MCU is 12 MHZ. This is because a cycle has six states, S1 to S6, and each state has two clock pulses (Fig. 3.7). MOVX A, DPTR is an instruction to move (transfer or copy) contents from the external memory address pointed by the DPTR 16 bits. It takes two cycles, each of six states.