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  1. Microcontroller 8051 family hardware has a CPU that has the ALU, controller and sequencing circuit, program counter, internal buses, address, instruction registers, an instruction decoder and special function registers.

  2. Pin signals in a 40 pin-member of 8051-family are as per the given Table 3.6.

  3. The name and address to access the byte and each bit for each SFR are as per the tables.

  4. The oscillator circuit gives 12 clock pulses for each machine cycle that consists of the states S1 to S6. Each state has 2 clock pulses.

  5. 8051 operates in two modes—single-chip mode and expanded mode.

  6. The signals in single chip at the IO pins are P0.0–P0.7, P1.0–P1.7, P2.0–P2.7, P3.0–P3.7.

  7. Port driving and sink currents must be known for a design of suitable interfacing circuit.

  8. An open drain port bit of 8051 must first be written 1 before using it as the input.

  9. 8051 internal program and data memory architecture is unique. It is described for the original family, called classic 8051. Two recently introduced architectures, 8051 extended and 8051MX, have large program and data memory.

  10. Two bits set the mode of operation in a timer.

  11. The 8052 family chips have the additional Timer T2. This facilitates a 16-bit timer/counter. There is a capture or a reload feature. T2 facilitates UART operations using the 16-bit timer, or capture of 16-bit time on external input or reload of 16-bit time.

  12. A member of the 8051 family may possess a watchdog timer. Its' function is to force a reset after a timeout.

  13. The serial interface facilitates the synchronous serial and asynchronous UART like serial communication in an instant. Three bits set the mode of operation in the SI.

  14. A bit IE.7 disables (masks) all the interrupts. The processor fetches the interrupt service routine address. This it does from a the vector address table for 8051 device interrupt source(s).


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