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| 1-1 | The IBM | 6 |
| 2-1 | The pSeries 670 and pSeries 690 base rack with components | 19 |
| 2-2 | CEC front view | 20 |
| 2-3 | CEC rear view | 21 |
| 2-4 | CEC backplane orthogonal view | 22 |
| 2-5 | POWER4 multichip module | 26 |
| 2-6 | Multichip module with L2, L3, and memory | 27 |
| 2-7 | pSeries 690 1.3 GHz Turbo and 1.3 GHz HPC feature | 29 |
| 2-8 | MCM, L3 cache, and memory slots relationship on backplane | 30 |
| 2-9 | Logical relationship between MCMs, memory, and GX Slots | 31 |
| 2-10 | Interconnection between four MCMs | 32 |
| 2-11 | Interconnection between processors in an MCM | 33 |
| 2-12 | MCMs and RIO ports relationship (pSeries 690) | 41 |
| 2-13 | MCM, L3 cache, and memory slots relationship on backplane | 43 |
| 2-14 | MCMs and RIO ports relationship (pSeries 670) | 46 |
| 2-15 | Primary and secondary I/O books | 48 |
| 2-16 | Book packaging | 50 |
| 2-17 | I/O drawer rear view | 51 |
| 2-18 | Difference between RIO and RIO-2 connectors | 52 |
| 2-19 | Logical view of an RIO drawer | 53 |
| 2-20 | Logical view of an RIO -G drawer | 53 |
| 2-21 | RIO loops supported configurations | 58 |
| 2-22 | RIO-2 loops supported configurations | 59 |
| 2-23 | RIO connections for three I/O drawers with IBF configuration | 61 |
| 2-24 | Number of usable RIO or RIO-2 ports | 64 |
| 2-25 | I/O drawer and IBF placement positions (pSeries 690) | 66 |
| 2-26 | I/O drawer and IBF placement positions (pSeries 670) | 67 |
| 2-27 | Physical location in frame 1 of pSeries 670 and pSeries 690 | 68 |
| 2-28 | Physical location in frame 2 of pSeries 690 | 69 |
| 2-29 | Media drawer power and SCSI connection | 71 |
| 2-30 | Media drawer | 72 |
| 2-31 | Power subsystem locations in BPA | 73 |
| 2-32 | Graphical user interface on the HMC | 76 |
| 3-1 | IBM Configurator for e-business version | 80 |
| 3-2 | Add Initial Order icon | 98 |
| 3-3 | The e-config main panel | 99 |
| 3-4 | Graphical representation of pSeries 690 in configuration view | 100 |
| 3-5 | pSeries 690 CEC wizard after double-clicking Rack Server 1 | 101 |
| 3-6 | System tab for the pSeries 690 | 103 |
| 3-7 | Detailed diagram for the pSeries 690 CEC | 105 |
| 3-8 | Detailed diagram for the media drawer | 106 |
| 3-9 | Selection of I/O drawer storage and RIO cabling options | 107 |
| 3-10 | Adapter tab for the I/O drawer | 108 |
| 3-11 | Adapter tab with LAN adapter category selected | 109 |
| 3-12 | Detailed diagram of the I/O drawer | 110 |
| 3-13 | Duplicating an existing drawer | 111 |
| 3-14 | Selecting a new I/O drawer | 111 |
| 3-15 | HMC wizard | 113 |
| 3-16 | HMC adapter options | 114 |
| 3-17 | The error, warning, and information output of the configuration | 115 |
| 3-18 | Right-click the error message text and it opens a menu | 115 |
| 3-19 | Detailed error message | 116 |
| 3-20 | Perform Final Validation icon | 116 |
| 3-21 | Add Upgrade/MES or Restore CFR icon | 117 |
| 3-22 | Perform Final Validation icon | 119 |
| 3-23 | A graphical representation of the final configuration | 123 |
| 3-24 | Starting to upgrade an existing configuration | 124 |
| 3-25 | Start upgrading the CEC | 125 |
| 3-26 | Changing model to pSeries 690 | 126 |
| 3-27 | Errors in the Messages tab | 126 |
| 3-28 | Changing the number of AIX licenses | 127 |
| 3-29 | Duplicating I/O drawer 4 | 129 |
| 3-30 | Messages view during feature upgrade | 130 |
| 4-1 | Click to Accept on the HMC at initial boot | 144 |
| 4-2 | Click to Accept window | 145 |
| 4-3 | CUoD menu on the HMC | 147 |
| 4-4 | Processor Capacity Settings | 148 |
| 4-5 | Save Processor Order Information | 148 |
| 4-6 | Send CUoD and system data | 149 |
| 4-7 | Activate CUoD Resources | 150 |
| 4-8 | To activate the resources using Trial CoD function | 152 |
| 4-9 | CUoD Trial CoD Processor Capacity (Next) screen | 152 |
| 4-10 | CUoD Trial CoD Processor capacity (Finish) screen | 153 |
| 4-11 | Warning message to Disable Processor Trial CoD Capacity | 154 |
| 5-1 | Service processor schematic | 160 |
| 5-2 | FFDC error checkers and fault isolation registers | 161 |
| 5-3 | Memory error recovery mechanisms | 164 |
| 5-4 | CPU Guard activities handled by AIX | 169 |
| 5-5 | CPU Guard activities handled by firmware | 170 |
| 5-6 | Blind swap cassette | 175 |
| 5-7 | Hot-Plug PCI adapters, blind swap cassette, and status LEDs | 176 |
| 5-8 | Status LEDs for components in I/O drawers | 177 |
| 5-9 | Software maintenance | 178 |
| 5-10 | Service Applications | 179 |
| 5-11 | Error reporting and consolidation | 180 |
| 5-12 | Software Maintenance: HMC | 182 |
| 5-13 | Format Media | 182 |
| 5-14 | Backup Critical Data | 183 |
| 5-15 | Install Corrective Service | 183 |
| 5-16 | Software Maintenance: HMC (2) | 184 |
| 5-17 | Mechanism of the Microcode Updates | 185 |
| 5-18 | Microcode Updates | 186 |
| 5-19 | Download and Apply Microcode | 186 |
| 5-20 | Select Repository Location | 187 |
| 5-21 | Microcode Survey Results | 188 |
| 5-22 | Microcode Installation - Device Installation | 188 |
| 5-23 | Warning message | 189 |
| 5-24 | Updating microcodes | 190 |
| 5-25 | Microcode Updates completed | 191 |
| 5-26 | Inventory Scout Services | 192 |
| 5-27 | Inventory Scout Configuration Assistant | 195 |
| 5-28 | Service Agent on the HMC | 196 |
| 5-29 | Service Agent on the HMC | 197 |
| 5-30 | Service Focal Point: Hardware Service Functions | 199 |
| 5-31 | Hardware Service Functions overview | 200 |
| 5-32 | FRU LED Management | 200 |
| B-1 | RIO drawer, in single-loop mode on a 1.3 GHz server | 218 |
| B-2 | RIO-2 drawer, in dual-loop mode on a 1.7GHz server | 219 |
| B-3 | RIO-2 drawer, in single-loop mode on a 1.7 GHz server | 220 |
| B-4 | Mixed RIO/RIO-2 drawer, in dual-loop mode on a 1.7 GHz server | 221 |
| B-5 | Migrated single-loop mode on a 1.7 GHz server | 222 |
| B-6 | Configuration for maximum bandwidth | 223 |
| B-7 | Configuration for maximum number of adapters and disks | 224 |
| B-8 | Configuration after migration to RIO-2 Books without recabling | 225 |